1. Field of the Invention
This invention relates generally to Josephson tunneling logic circuits and is more specifically related to logic arrays utilizing Josephson tunneling junctions. Still more specifically, it relates to logic circuits wherein isolation and resetting of the logic gate utilizes active devices. The active device isolation and resetting means, in the form of a switchable Josephson junction, provides for affirmative control of the resetting of the logic gate while at the same time providing for d.c. regulation of a string of such logic circuits. The ability to reset latching logic gates locally eliminates the necessity for interrupting power supply currents which are the usual manner for resetting logic circuits which latch. As a result, perfect d.c. regulation for any number of gates in a string may be achieved. Further, the ability to reset locally means fast cycle time and ease of gate current supply requirements.
2. Description of the Prior Art
Josephson junction devices and Josephson junction logic circuits are well known in the prior art. The problem of eliminating cross-talk between Josephson devices in Josephson logic arrays, which are due to current transients when a device switches, is also well known. The resetting of logic circuits locally while simultaneously minimizing cross-talk due to current transients has been addressed in a copending application entitled "Low Cross-talk Automatic Resetting Scheme for Josephson Junction Logic Circuit" in the name of H. H. Zappe, Ser. No. 540,762, filed Jan. 14, 1975, which is a continuation of application Ser. No. 422,959, filed Dec. 7, 1973, now abandoned, and assigned to the same assignee as the present application. In that application, logic circuit isolation and resetting is achieved by the use of passive impedances disposed in the gate current feeder lines of the logic circuit. The use of high and low impedance portions of the gate current feeder line also provides for resetting of a switched Josephson logic circuit without the need for altering the d.c. current supplied to the gate current feeder line. The present application is distinguishable over the above mentioned copending application in that the present application utilizes an active device which is responsive to the presence of disturb signals or current transients which cause the active device to reset, thereby generating a disturb signal or current transient which cancels the original disturb signal or current transient with a small delay. Because the active device is now in the zero voltage state, it would have no effect on subsequent disturb signals and, as a result, must be switched to the voltage state. This can be accomplished by the use of a separate bias line which permits a flexibility not attainable using passive devices, i.e., control of the resetting of the logic gate by actuation of the active regulator gate whose disturb signal resets the logic gate and prepares the latter for the next cycle of operation.